Field-Programmable Gate Arrays (FPGA) have been an interest of mine for well over a decade now. Being able to generate
complex signals in the tens of MHz range with nanosecond accuracy, dealing with fast data streams, and doing all of this
at a fraction of the power consumption of fast CPUs, they really have a lot of potential for fun. However, their
prohibitive cost, proprietary toolchains (some running only on Windows), and the insanely-long bitstream generation made
them look more like a curiosity to me rather than a practical solution. Finally, writing verilog / VHDL directly felt
like the equivalent of writing an OS in assembly and thus felt more like torture than fun for the young C/C++ developer
that I was. Little did I know that 10+ years later, I would find HW development to be the most amazing thing ever!
The first thing that changed is that I got involved in reverse engineering NVIDIA GPUs’ power management in order to write
an open source driver, writing in a reverse-engineed assembly to implement automatic power management for this driver,
creating my own smart wireless modems which detects the PHY parameters of incoming transmissions on the fly (modulation,
center frequency) by using software-defined radio, and having fun with arduinos, single-board computers, and designing my
The second thing that changed is that Moore’s law has grinded to a halt, leading to a more architecture-centric instead
of a fab-oriented world. This reduced the advantage ASICs had on FPGAs, by creating a software eco-system that is more
geared towards parallelism rather than high-frequency single-thread performance.
Finally, FPGAs along with their community have gotten a whole lot more attractive! From the FPGAs themselves to their
toolchains, let’s review what changed, and then ask ourselves why this has not translated to upstream Linux drivers for
FPGA-based open source designs.